[Funded PhD] Modular Analysis for Formal Verification of Integrated Circuits at Transistor Level

PhD Director: Matthieu Moy

PhD Advisors: Bruno Ferres and Mehdi Khosravian

Context

This CIFRE [1] PhD proposal is part of a joint work between Verimag, LIP (ENS Lyon), and Aniah (Grenoble). It will be the continuation of a fruitful collaboration (during a first CIFRE PhD, giving promising results), and is based on several domains of Computer Science, from theoretical tools (SMT, model-checking, ...) to practical engineering concerns.

Please take a look at the attached proposal for more details, and do not hesitate to contact the advisors.

[1PhD thesis included in an industrial collaboration


Attached documents

CIFRE Proposal - Hierarchy

6 June 2024
info document : PDF
162.7 KiB

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