@phdthesis{Rom7,
title = { High-level component-based models for functional verification of systems-on-a-chip },
author = {Romenska, Yuliia},
year = {2017},
school = {Grenoble Alpes University, France},
team = {SYNC},
}
Home > Verimag > Publications
bibtex
Browsing
News
Seminars
New publications
- Some Recent Publications
- Karine Altisen, Stéphane Devismes, Anaïs Durand, Colette Johnen, Franck Petit: Self-stabilizing Systems in Spite of High Dynamics
- Bruno Ferres, Oussama Oulkaid, Ludovic Henrio, Mehdi Khosravian, Matthieu Moy, Gabriel Radanne, Pascal Raymond: Electrical Rule Checking of Integrated Circuits using Satisfiability Modulo Theory
- David Monniaux, Léo Gourdin, Sylvain Boulmé, Olivier Lebeltel: Testing a Formally Verified Compiler
- Karine Altisen, Alain Cournier, Geoffrey Defalque, Stéphane Devismes: Pour battre à l'unisson, il faut que tous les chemins viennent de Rome
Jobs and internships
- Jobs and internships
- [Master] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences
- [Funded PhD] Annotations de sécurité pour compilateur optimisant formellement vérifié
- [Funded PhD] Quantitative analysis of software security against adaptive attacks
- [Master] Adapting Hardware Platforms to a Multi-Core Response Time Analysis Framework
- [Master] Analyzing fault parameters triggering timing anomalies
- [Master] Exploration by model-checking of timing anomaly cancellation in a processor
- [Master] Towards New Frontiers in Multi-Core Response Time Analysis?
- [Master]Leakage in presence of an active and adaptive adversary
- [PostDoc] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences