@phdthesis{Moy14a,
title = { High-level Models for Embedded Systems },
author = {Moy, Matthieu},
year = {2014},
address = {Verimag},
type = {Habilitation \`a Diriger des Recherches ({HDR})},
school = {Univ. Grenoble Alpes, VERIMAG, F-38000 Grenoble, France},
team = {SYNC},
}
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- Conferences
- November 24-28 2025 Synchron 2025
Seminars
- Seminars
- 13 November 2025 Yann Herklotz: Towards scalable verification and efficient hardware generation using verified (…)
- 21 November 2025 Oussama Oulkaid: Formal models of integrated circuits for transistor level electrical verification (Phd)
- 25 November 2025 Véronique Cortier: Electronic voting: design, attack, and formal verification
- 1 December 2025 Sylvain Boulme: Introduction à la programmation orientée objet en crystal
- 4 December 2025 Jannik Laval: A venir (thème cybersécu)
- 11 December 2025 Thaïs Baudon: A venir (thème: compilation optimisant les représentations mémoire)
New publications
- Some Recent Publications
- Karine Altisen, Alain Cournier, Geoffrey Defalque, Stéphane Devismes: Self-stabilizing synchronous unison in directed networks
- David Monniaux, Sylvain Boulmé: Chamois: agile development of CompCert extensions for optimization and security
- Iulia Dragomir, Carlos Redondo, Tiago Jorge, Laura Gouveia, Iulian Ober, Marius Bozga, Maxime Perrotin: Specification and model-checking of space systems in the TASTE toolset
- Akram Idani, Yves Ledru, German Vega: Formal model-driven security combining B-method and process algebra: The B4MSecure platform
Jobs and internships
- Jobs and internships
- [Funded PhD] Fault Injection Attacks: Automated Analysis of Counter-Measures At The Binary Level
- [Master] Decision Procedure for Equivalence Relations
- [Master]Leakage in presence of an active and adaptive adversary
- [PostDoc] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences